By Mikko E. Waltari
For 4 many years the evolution of built-in circuits has Moore’s legislation, based on which the variety of transistors according to sq. millimeter of silicon doubles each 18 months. even as transistors became quicker, making attainable ever-increasing clock premiums in electronic circuits. This development turns out set to proceed for a minimum of one other decade with no slowing down. therefore, within the close to destiny the processing energy of electronic circuits will proceed to extend at an accelerating velocity. For analog circuits the evolution of expertise isn't really as worthy. therefore, there's a pattern to maneuver sign processing capabilities from the analog area to the electronic one, which, in addition to taking into account the next point of accuracy, offers discount rates in strength intake and silicon zone, raises robustness, accelerates the layout method, brings flexibility and programmability, and raises the probabilities for layout reuse. in lots of functions the enter and output indications of the method are inherently analog, fighting all-digital realizations; at the least a conversion among analog and electronic is required on the - terfaces. quite often, relocating the analog-digital boundary in the direction of the skin global raises the bit fee throughout it. In telecommunications platforms the rage to spice up bit charges is predicated on - ploying widerbandwidths and a better signal-to-noise ratio. even as radio architectures in lots of functions are evolving towards software-defined radio, one of many major features of that's the moving of the anal- electronic boundary towards the antenna.
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Additional resources for Circuit Techniques for Low-Voltage and High-Speed A/D Converters
6. For example, when the coarse A/D conversion tells us that the signal is between the first stage reference voltages and the taps in range 3 are used as fine references. A/D Converters 37 Subranging architecture allows for higher resolutions than the flash method, thanks to the reduced number of comparators. It cannot achieve as high a speed because of the S/H circuit that is needed and the fact that the fine ADC can operate only after the coarse result is available. The architecture does not alleviate the comparator accuracy requirement, unless inter-stage gain is introduced.
The realization of the preprocessing is, however, totally different. The architecture has evolved by making use of the strengths of the switched capacitor technique, which provides very accurate and linear analog amplification and summation operations in the discrete time domain. As a result the sawtooth-shaped transfer function can readily be realized. Because of the high quality of the preprocessing it is often used so extensively that the resolution of final A/D conversion is only one or two bits.
3) is obtained by replacing the reference voltages with their digital values. Typically, the final resolution is increased by performing an A/D conversion (without forming a residue) for the last residue signal. This is the only sub-A/D conversion whose accuracy directly affects the accuracy of the conversion. 12. It consists of stages, each of which produces bits plus one redundant bit, which overlaps with the bits of the next stage. The last pipeline stage is followed by a flash ADC, providing bits.
Circuit Techniques for Low-Voltage and High-Speed A/D Converters by Mikko E. Waltari